Dr.-Ing. Richard Membarth

Richard Membarth

Senior Researcher
German Research Center for Artificial Intelligence (DFKI)
Agents and Simulated Reality
Saarland Informatics Campus D3 4
66123 Saarbrücken
Germany

Office

Saarland University
Computer Graphics Lab & Intel Visual Computing Institute
Saarland Informatics Campus E1 1
66123 Saarbrücken
Germany

Contact

Phone:+49 681 302 3835
Fax:+49 681 302 3843
Email:richard.membarth@dfki.de
richard.membarth@uni-saarland.de

Projects

  • AnyDSL: A Partial Evaluation Framework for Programming High-Performance Libraries: anydsl.github.io
  • Hipacc: A domain-specific language and compiler for image processing: hipacc-lang.org

Teaching

Professional Scientific Activities

Program Committee Member

For more details have a look at my old website.

Publications

Google Scholar dblp

2018

35 R. Leißa, K. Boesche, S. Hack, A. Pérard-Gayot, R. Membarth, P. Slusallek, André Müller, and Bertil Schmidt
AnyDSL: A Partial Evaluation Framework for Programming High-Performance Libraries
Proceedings of the ACM on Programming Languages (PACMPL), 2(OOPSLA): 1-30, 2018
 [doi>10.1145/3276489]
@article{leissa2018anydsl,
  author          = {Leißa, Roland and Boesche, Klaas and Hack, Sebastian and Pérard-Gayot, Arsène and Membarth, Richard and Slusallek, Philipp and Müller, André and Schmidt, Bertil},
  title           = {{AnyDSL}: A Partial Evaluation Framework for Programming High-Performance Libraries},
  journal         = {Proceedings of the ACM on Programming Languages (PACMPL)},
  pages           = {1--30},
  volume          = {2},
  number          = {OOPSLA},
  %year            = 2018,
  %month           = nov,
  date            = {2018-11-04/2018-11-09},
  doi             = {10.1145/3276489},
  organization    = {ACM}
}
34 M. A. Özkan, A. Pérard-Gayot, R. Membarth, P. Slusallek, J. Teich, and F. Hannig
A Journey into DSL Design using Generative Programming: FPGA Mapping of Image Border Handling through Refinement
Proceedings of the Fifth International Workshop on FPGAs for Software Programmers (FSP), pp. 1-9, Dublin, Ireland, August 31, 2018
 
@inproceedings{oezkan2018fpgaborderhandling,
  author       = {Özkan, Mehmet Akif and Pérard-Gayot, Arsène and Membarth, Richard and Slusallek, Philipp and Teich, Jürgen and Hannig, Frank},
  address      = {Dublin, Ireland},
  booktitle    = {Proceedings of the Fifth International Workshop on FPGAs for Software Programmers (FSP)},
  title        = {{A Journey into DSL Design using Generative Programming: FPGA Mapping of Image Border Handling through Refinement}},
  pages        = {1--9},
  year         = 2018,
  month        = aug,
  date         = {2018-08-31},
  doi          = {},
  organization = {VDE}
}
33 J. Schmitt, H. Köstler, J. Eitzinger, and R. Membarth
Unified Code Generation for the Parallel Computation of Pairwise Interactions using Partial Evaluation
Proceedings of the 17th International Symposium on Parallel and Distributed Computing (ISPDC), pp. 17-24, Geneva, Switzerland, June 25-28, 2018
  [doi>10.1109/ISPDC2018.2018.00012]
@inproceedings{schmitt2018unifiedmd,
    author          = {Schmitt, Jonas and Köstler, Harald and Eitzinger, Jan and Membarth, Richard},
    address         = {Geneva, Switzerland},
    booktitle       = {Proceedings of the 17th International Symposium on Parallel and Distributed Computing (ISPDC)},
    title           = {{Unified Code Generation for the Parallel Computation of Pairwise Interactions using Partial Evaluation}},
    pages           = {17--24},
    year            = 2018,
    month           = jun,
    date            = {2018-06-25/2018-06-28},
    doi             = {10.1109/ISPDC2018.2018.00012},
    organization    = {IEEE}
}
32 A. Pérard-Gayot, R. Membarth, P. Slusallek, S. Moll, R. Leißa, and S. Hack
A Data Layout Transformation for Vectorizing Compilers
Proceedings of the 2018 Workshop on Programming Models for SIMD/Vector Processing (WPMVP), pp. 7:1-7:8, Vösendorf / Vienna, Austria, February 24, 2018
  [doi>10.1145/3178433.3178440]
@inproceedings{perard2018splitalloca,
  author       = {Pérard-Gayot, Arsène and Membarth, Richard and Slusallek, Philipp and Moll, Simon and Leißa, Roland and Hack, Sebastian},
  address      = {Vösendorf / Vienna, Austria},
  booktitle    = {Proceedings of the 2018 Workshop on Programming Models for SIMD/Vector Processing (WPMVP)},
  title        = {{A Data Layout Transformation for Vectorizing Compilers}},
  pages        = {7:1--7:8},
  year         = 2018,
  month        = feb,
  date         = {2018-02-24},
  doi          = {10.1145/3178433.3178440},
  organization = {ACM}
}

2017

31 O. Reiche, M. A. Özkan, R. Membarth, J. Teich, and F. Hannig
Generating FPGA-based Image Processing Accelerators with Hipacc
Invited Paper
Proceedings of the International Conference On Computer Aided Design (ICCAD), pp. 1026-1033, Irvine, CA, USA, November 13-16, 2017
  [doi>10.1109/ICCAD.2017.8203894]
@inproceedings{reiche2017hipaccfpga,
  author       = {Reiche, Oliver and Özkan, Mehmet Akif and Membarth, Richard and Teich, Jürgen and Hannig, Frank},
  address      = {Irvine, CA, USA},
  booktitle    = {Proceedings of the International Conference On Computer Aided Design (ICCAD)},
  title        = {{Generating FPGA-based Image Processing Accelerators with Hipacc}},
  pages        = {1026--1033},
  year         = 2017,
  month        = nov,
  date         = {2017-11-13/2017-11-16},
  note         = {{Invited Paper}},
  doi          = {10.1109/ICCAD.2017.8203894},
  organization = {IEEE}
}
30 A. Pérard-Gayot, M. Weier, R. Membarth, P. Slusallek, R. Leißa, and S. Hack
RaTrace: Simple and Efficient Abstractions for BVH Ray Traversal Algorithms
Proceedings of 16th ACM SIGPLAN International Conference on Generative Programming: Concepts & Experiences (GPCE), pp. 157-168, Vancouver, BC, Canada, October 23-24, 2017
  [doi>10.1145/3136040.3136044]
@inproceedings{perard2017ratrace,
  author       = {Pérard-Gayot, Arsène and Weier, Martin and Membarth, Richard and Slusallek, Philipp and Leißa, Roland and Hack, Sebastian},
  address      = {Vancouver, BC, Canada},
  booktitle    = {Proceedings of the 16th International Conference on Generative Programming: Concepts \& Experiences (GPCE)},
  title        = {{RaTrace: Simple and Efficient Abstractions for BVH Ray Traversal Algorithms}},
  pages        = {157--168},
  year         = 2017,
  month        = oct,
  date         = {2017-10-23/2017-10-24},
  doi          = {10.1145/3136040.3136044},
  organization = {ACM}
}
29 D. Pohl, D. Jungmann, B. Taudul, R. Membarth, H. Hariharan, T. Herfet, and O. Grau
The Next Generation of In-home Streaming: Light Fields, 5K, 10 GbE, and Foveated Compression
Best Paper Award
Proceedings of the 10th International Symposium on Multimedia Applications and Processing (MMAP), pp. 663-667, Prague, Czech Republic, September 3-6, 2017
  [doi>10.15439/2017F16]
@inproceedings{pohl2017nextgeneration,
  author       = {Pohl, Daniel and Jungmann, Daniel and Taudul, Bartosz and Membarth, Richard and Hariharan, Harini and Herfet, Thorsten and Grau, Oliver},
  address      = {Prague, Czech Republic},
  booktitle    = {Proceedings of the 10th International Symposium on Multimedia Applications and Processing (MMAP)},
  title        = {{The Next Generation of In-home Streaming: Light Fields, 5K, 10 GbE, and Foveated Compression}},
  pages        = {663--667},
  year         = 2017,
  month        = sep,
  date         = {2017-09-03/2017-09-06},
  note         = {{Best Paper Award}},
  doi          = {10.15439/2017F16},
  organization = {IEEE}
}

2016

28 R. Membarth, O. Reiche, F. Hannig, J. Teich, M. Körner, and W. Eckert
Hipacc: A Domain-Specific Language and Compiler for Image Processing
Transactions on Parallel and Distributed Systems (TPDS), 27(1): 210-224, 2016
  [doi>10.1109/TPDS.2015.2394802]
@article{membarth2016hipacc,
  author    = {Membarth, Richard and Reiche, Oliver and Hannig, Frank and Teich, Jürgen and Körner, Mario and Eckert, Wieland},
  title     = {{Hipacc: A Domain-Specific Language and Compiler for Image Processing}},
  journal   = {Transactions on Parallel and Distributed Systems (TPDS)},
  pages     = {210--224},
  volume    = {27},
  number    = {1},
  year      = 2016,
  month     = jan,
  date      = {2016-01-01},
  doi       = {10.1109/TPDS.2015.2394802},
  publisher = {IEEE},
}

2015

27 R. Leißa, K. Boesche, S. Hack, R. Membarth, and P. Slusallek
Shallow Embedding of DSLs via Online Partial Evaluation
Best Paper Award
Proceedings of the 14th International Conference on Generative Programming: Concepts & Experiences (GPCE), pp. 11-20, Pittsburgh, PA, USA, October 26-27, 2015
  [doi>10.1145/2936314.2814208]
@inproceedings{leissa2015shallow,
  author       = {Leißa, Roland and Boesche, Klaas and Hack, Sebastian and Membarth, Richard and Slusallek, Philipp},
  address      = {Pittsburgh, PA, USA},
  booktitle    = {Proceedings of the 14th International Conference on Generative Programming: Concepts \& Experiences (GPCE)},
  title        = {{Shallow Embedding of DSLs via Online Partial Evaluation}},
  pages        = {11--20},
  year         = 2015,
  month        = oct,
  note         = {{Best Paper Award}},
  date         = {2015-10-26/2015-10-27},
  doi          = {10.1145/2814204.2814208},
  organization = {ACM}
}
26 D. Pohl, B. Taudul, R. Membarth, S. Nickels, and O. Grau
Advanced In-home Streaming to Mobile Devices and Wearables
International Journal of Computer Science & Applications (IJCSA), 12(2): 20-36, 2015
  
@article{pohl2015inhomestreaming,
  author    = {Pohl, Daniel and Taudul, Bartosz and Membarth, Richard and Nickels, Stefan and Grau, Oliver},
  title     = {{Advanced In-home Streaming to Mobile Devices and Wearables}},
  journal   = {International Journal of Computer Science \& Applications (IJCSA)},
  pages     = {20--36},
  volume    = {12},
  number    = {2},
  year      = 2015,
  month     = aug,
  date      = {2015-08},
  issn      = {0972-9038},
  publisher = {Technomathematics Research Foundation},
}

2014

25 R. Membarth, O. Reiche, C. Schmitt, F. Hannig, J. Teich, M. Stürmer, and H. Köstler
Towards a Performance-portable Description of Geometric Multigrid Algorithms using a Domain-specific Language
Journal of Parallel and Distributed Computing (JPDC), 24(12): 3191-3201, 2014
  [doi>10.1016/j.jpdc.2014.08.008]
@article{membarth2014towards,
  author    = {Membarth, Richard and Reiche, Oliver and Schmitt, Christian and Hannig, Frank and Teich, Jürgen and Stürmer, Markus and Köstler, Harald},
  title     = {{Towards a Performance-portable Description of Geometric Multigrid Algorithms using a Domain-specific Language}},
  journal   = {Journal of Parallel and Distributed Computing (JPDC)},
  pages     = {3191--3201},
  volume    = {74},
  number    = {12},
  year      = 2014,
  month     = dec,
  date      = {2014-12},
  doi       = {10.1016/j.jpdc.2014.08.008},
  publisher = {Elsevier}
}
24 R. Membarth, P. Slusallek, M. Köster, R. Leißa, and S. Hack
Target-Specific Refinement of Multigrid Codes
Proceedings of the 4th International Workshop on Domain-Specific Languages and High-Level Frameworks for High Performance Computing (WOLFHPC), pp. 52-57, New Orleans, LA, USA, November 17, 2014
  [doi>10.1109/WOLFHPC.2014.5]
@inproceedings{membarth2014refinement,
  author       = {Membarth, Richard and Slusallek, Philipp and Köster, Marcel and Leißa, Roland and Hack, Sebastian},
  address      = {New Orleans, LA, USA},
  booktitle    = {Proceedings of the 4th International Workshop on Domain-Specific Languages and High-Level Frameworks for High Performance Computing (WOLFHPC)},
  title        = {{Target-Specific Refinement of Multigrid Codes}},
  pages        = {52--57},
  year         = 2014,
  month        = nov,
  date         = {2014-11-17},
  doi          = {10.1109/WOLFHPC.2014.5},
  organization = {IEEE}
}
23 O. Reiche, M. Schmid, F. Hannig, R. Membarth, and J. Teich
Code Generation from a Domain-specific Language for C-based HLS of Hardware Accelerators
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), pp. 1-10, New Dehli, India, October 12-17, 2014
  [doi>10.1145/2656075.2656081]
@inproceedings{reiche2014hls,
  author       = {Reiche, Oliver and Schmid, Moritz and Hannig, Frank and Membarth, Richard and Teich, Jürgen},
  booktitle    = {Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS)},
  venue        = {New Dehli, India},
  title        = {{Code Generation from a Domain-specific Language for C-based HLS of Hardware Accelerators}},
  pages        = {17:1--17:10},
  articleno    = {17},
  numpages     = {10},
  year         = 2014,
  month        = oct,
  date         = {2014-10-12/2014-10-17},
  doi          = {10.1145/2656075.2656081},
  organization = {ACM}
}
22 P. Danilewski, M. Köster, R. Leißa, R. Membarth, and P. Slusallek
Specialization through Dynamic Staging
Proceedings of the 13th International Conference on Generative Programming: Concepts & Experiences (GPCE), pp. 103-112, Västerås, Sweden, September 15-16, 2014
  [doi>10.1145/2658761.2658774]
@inproceedings{danilewski2014specialization,
  author    = {Danilewski, Piotr and Köster, Marcel and Leißa, Roland and Membarth, Richard and Slusallek, Philipp},
  address   = {Västerås, Sweden},
  booktitle = {Proceedings of the 13th International Conference on Generative Programming: Concepts \& Experiences (GPCE)},
  title     = {{Specialization through Dynamic Staging}},
  pages     = {103--112},
  year      = 2014,
  month     = sep,
  date      = {2014-09-15/2014-09-16},
}
21 M. Köster, R. Leißa, S. Hack, R. Membarth, and P. Slusallek
Code Refinement of Stencil Codes
Parallel Processing Letters (PPL), 24(3): 1-16, 2014
  [doi>10.1142/S0129626414410035]
@article{koester2014platformppl,
  author    = {Köster, Marcel and Leißa, Roland and Hack, Sebastian and Membarth, Richard and Slusallek, Philipp},
  title     = {{Code Refinement of Stencil Codes}},
  journal   = {Parallel Processing Letters (PPL)},
  pages     = {1--16},
  volume    = {24},
  number    = {3},
  year      = 2014,
  month     = sep,
  date      = {2014-09},
  doi       = {10.1142/S0129626414410035},
  publisher = {World Scientific}
}
20 R. Membarth, O. Reiche, F. Hannig, and J. Teich
Code Generation for Embedded Heterogeneous Architectures on Android
Proceedings of the Conference on Design, Automation and Test in Europe (DATE), pp. 86:1-86:6, Dresden, Germany, March 24-28, 2014
  [doi>10.7873/DATE.2014.099]
@inproceedings{membarth2014android,
  author       = {Membarth, Richard and Reiche, Oliver and Hannig, Frank and Teich, Jürgen},
  address      = {Dresden, Germany},
  booktitle    = {Proceedings of the Conference on Design, Automation and Test in Europe (DATE)},
  title        = {{Code Generation for Embedded Heterogeneous Architectures on Android}},
  pages        = {86:1--86:6},
  year         = 2014,
  month        = mar,
  date         = {2014-03-24/2014-03-28},
  doi          = {10.7873/DATE.2014.099},
  organization = {IEEE}
}
19 M. Köster, R. Leißa, S. Hack, R. Membarth, and P. Slusallek
Platform-Specific Optimization and Mapping of Stencil Codes through Refinement
Proceedings of the 1st International Workshop on High-Performance Stencil Computations (HiStencils), pp. 1-6, Vienna, Austria, January 21, 2014
  
@inproceedings{koester2014platformhistencils,
  author    = {Köster, Marcel and Leißa, Roland and Hack, Sebastian and Membarth, Richard and Slusallek, Philipp},
  address   = {Vienna, Austria},
  booktitle = {Proceedings of the 1st International Workshop on High-Performance Stencil Computations (HiStencils)},
  title     = {{Platform-Specific Optimization and Mapping of Stencil Codes through Refinement}},
  pages     = {1--6},
  date      = {2014-01-21},
}

2013

18 R. Membarth.
Code Generation for GPU Accelerators from a Domain-Specific Language for Medical Imaging.
Dissertation, University of Erlangen-Nuremberg, ISBN 978-3-8439-1074-3, Verlag Dr. Hut, Munich, Germany, May 2, 2013.
 

2012

17 R. Membarth, F. Hannig, J. Teich and H. Köstler.
Towards Domain-specific Computing for Stencil Codes in HPC.
In Proceedings of the 2nd International Workshop on Domain-Specific Languages and High-Level Frameworks for High Performance Computing (WOLFHPC), pp. 1133-1138, Salt Lake City, UT, USA, November 16, 2012.
  [doi>10.1109/SC.Companion.2012.136]
16 R. Membarth, F. Hannig, J. Teich, M. Körner and W. Eckert.
Mastering Software Variant Explosion for GPU Accelerators.
In Proceedings of the 10th International Workshop on Algorithms, Models and Tools for Parallel Computing on Heterogeneous Platforms (HeteroPar), pp. 123-132, Rhodes Island, Greece, August 27, 2012.
  [doi>10.1007/978-3-642-36949-0_15]
15 R. Membarth, F. Hannig, J. Teich, M. Körner and W. Eckert.
Automatic Optimization of In-Flight Memory Transactions for GPU Accelerators based on a Domain-Specific Language for Medical Imaging.
In Proceedings of the 11th International Symposium on Parallel and Distributed Computing (ISPDC), pp. 211-218, Munich, Germany, June 25-29, 2012.
  [doi>10.1109/ISPDC.2012.36]
14 R. Membarth, F. Hannig, J. Teich, M. Körner and W. Eckert.
Generating Device-specific GPU Code for Local Operators in Medical Imaging.
In Proceedings of the 26th IEEE International Parallel & Distributed Processing Symposium (IPDPS), pp. 569-581, Shanghai, China, May 21-25, 2012.
  [doi>10.1109/IPDPS.2012.59]
13 R. Membarth, J. Lupp, F. Hannig, J. Teich, M. Körner and W. Eckert.
Dynamic Task-Scheduling and Resource Management for GPU Accelerators in Medical Imaging.
In Proceedings of the 25th International Conference on Architecture of Computing Systems (ARCS), pp. 147-159, Munich, Germany, February 28 - March 02, 2012.
  [doi>10.1007/978-3-642-28293-5_13]

2011

12 R. Membarth, A. Lokhmotov and J. Teich.
Generating GPU Code from a High-level Representation for Image Processing Kernels.
In Proceedings of the 5th Workshop on Highly Parallel Processing on a Chip (HPPC), pp. 270-280, Bordeaux, France, August 30, 2011.
  [doi>10.1007/978-3-642-29737-3_31]
11 R. Membarth, F. Hannig, J. Teich, M. Körner and W. Eckert.
Frameworks for GPU Accelerators: A Comprehensive Evaluation using 2D/3D Image Registration.
In Proceedings of the 9th IEEE Symposium on Application Specific Processors (SASP), pp. 78-81, San Diego, CA, USA, June 5-6, 2011.
  [doi>10.1109/SASP.2011.5941083]
10 R. Membarth, H. Dutta, F. Hannig and J. Teich.
Efficient Mapping of Streaming Applications for Image Processing on Graphics Cards.
In Transactions on High-Performance Embedded Architectures and Compilers (Transactions on HiPEAC), 5(3), 2011.
 
9 R. Membarth, F. Hannig, J. Teich, M. Körner and W. Eckert.
Frameworks for Multi-core Architectures: A Comprehensive Evaluation using 2D/3D Image Registration.
In Proceedings of the 24th International Conference on Architecture of Computing Systems (ARCS), pp. 62-73, Lake Como, Italy, February 22-25, 2011.
  [doi>10.1007/978-3-642-19137-4_6]
8 R. Membarth, F. Hannig, J. Teich, G. Litz and H. Hornegger.
Detector Defect Correction of Medical Images on Graphics Processors.
In Proceedings of the SPIE: Medical Imaging 2011: Image Processing, pp. 79624M 1-12, Lake Buena Vista, Orlando, FL, USA, February 12-17, 2011.
  [doi>10.1117/12.877656]

2010

7 R. Membarth, F. Hannig, J. Teich, M. Körner and W. Eckert.
Comparison of Parallelization Frameworks for Shared Memory Multi-Core Architectures.
In Proceedings of the Embedded World Conference, Nuremberg, Germany, March 03-05, 2010.
 

2009

6 N. Sarkar and R. Membarth.
Modeling and Simulation of IEEE 802.11g using OMNeT++.
In Handbook of Research on Discrete Event Simulation Environments: Technologies and Applications, pp. 379-397, Information Science Reference, Hershey, PA, October, 2009.
 [doi>10.4018/978-1-60566-774-4.ch017]
5 F. Arifin, R. Membarth, A. Amouri, F. Hannig and J. Teich.
FSM-Controlled Architectures for Linear Invasion.
In Proceedings of the 17th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), pp. 59-64, Florianópolis, Brazil, October 12-14, 2009.
  [doi>10.1109/VLSISOC.2009.6041331]
4 R. Membarth, F. Hannig, H. Dutta and J. Teich.
Efficient Mapping of Multiresolution Image Filtering Algorithms on Graphics Processors.
In Proceedings of the 9th International Workshop on Systems, Architectures, Modeling, and Simulation (SAMOS Workshop), pp. 277-288, July 20-23, 2009.
  [doi>10.1007/978-3-642-03138-0_31]
3 R. Membarth, F. Hannig, H. Dutta and J. Teich.
Optimization Flow for Algorithm Mapping on Graphics Cards.
In Proceedings of ACACES 2009 Poster Abstracts: Advanced Computer Architecture and Compilation for Embedded Systems, pp. 229-232, Barcelona, Spain, July 12-18, 2009.
 
2 R. Membarth, P. Kutzer, H. Dutta, F. Hannig and J. Teich.
Acceleration of Multiresolution Imaging Algorithms: A Comparative Study.
In Proceedings of the 20th IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP), pp. 211-214, Boston, MA, USA, July 7-9, 2009.
  [doi>10.1109/ASAP.2009.8]

2006

1 K. Köker, R. Membarth and R. German.
Performance Analyses of Embedded Real-Time Operating Systems Using High-Precision Counters.
In Proceedings of the 3rd International Conference on Autonomous Robots and Agents (ICARA), pp 485-490, Palmerston North, New Zealand, December 12-14, 2006.
 

Misc.

2017

15 R. Membarth.
AnyDSL: A Compiler-Framework for Domain-Specific Libraries (DSLs).
Talk at the Dagstuhl Seminar 17431. Performance Portability in Extreme Scale Computing: Metrics, Challenges, Solutions. Dagstuhl, Germany, October 22-27, 2017.
      [doi>10.4230/DagRep.7.10.84]

@Article{dubey_et_al:DR:2018:8664,
  author    = {Anshu Dubey and Paul H. J. Kelly and Bernd Mohr and Jeffrey S. Vetter},
  title     = {{Performance Portability in Extreme Scale Computing (Dagstuhl Seminar 17431)}},
  pages     = {84--110},
  journal   = {Dagstuhl Reports},
  ISSN      = {2192-5283},
  year      = {2018},
  volume    = {7},
  number    = {10},
  editor    = {Anshu Dubey and Paul H. J. Kelly and Bernd Mohr and Jeffrey S. Vetter},
  publisher = {Schloss Dagstuhl--Leibniz-Zentrum für Informatik},
  address   = {Dagstuhl, Germany},
  URL       = {http://drops.dagstuhl.de/opus/volltexte/2018/8664},
  URN       = {urn:nbn:de:0030-drops-86642},
  doi       = {10.4230/DagRep.7.10.84},
  annote    = {Keywords: Parallel programming, performance portability, productivity, scientific computing}
}


14 R. Membarth.
AnyDSL: A Compiler-Framework for Domain-Specific Libraries (DSLs).
Poster Presentation at the 2017 European LLVM Developers Meeting. Saarbrücken, Germany, March 27-28, 2017.
13 R. Membarth.
AnyDSL: A Compiler-Framework for Domain-Specific Libraries (DSLs).
RTG Workshop Heterogeneous Image Systems (HIS), Waischenfeld, Germany, March 23-24, 2017.

2016

12 C. Lauer and R. Membarth.
Collision Avoidance on NVIDIA Tegra.
Talk at the GPU Technology Conference (GTC), San Jose, CA, USA, April 04-07, 2016.

2014

11 R. Membarth, P. Slusallek, R. Leißa, M. Köster and S. Hack.
AnyDSL: Platform-specific Optimization and Mapping of Stencil Codes through Refinement.
Poster Presentation at the Big Data Visual Computing (BDVC) Workshop, Stuttgart, Germany, September 22, 2014.
10 R. Membarth and O. Reiche.
HIPAcc: A Domain-Specific Language and Compiler for Image Processing.
Poster Presentation at the GPU Technology Conference (GTC), San Jose, CA, USA, March 24-27, 2014.
9 R. Membarth, P. Slusallek, M. Köster, R. Leißa and S. Hack.
High-Performance Domain-Specific Languages for GPU Computing.
Poster Presentation at the GPU Technology Conference (GTC), San Jose, CA, USA, March 24-27, 2014.
8 O. Reiche, R. Membarth, F. Hannig and J. Teich.
Automatic GPU Code Generation for Android.
Hardware and Software Demo at the University Booth at Design, Automation and Test in Europe (DATE), Dresden, Germany, March 24-28, 2014.
7 R. Membarth.
AnyDSL: Platform-specific Optimization and Mapping of Stencil Codes through Refinement.
Talk at the HiGraphics Workshop, Kleinwalsertal, Austria, March 14-17, 2014.

2013

6 R. Membarth.
Code Generation for GPU Accelerators in the Domain of Image Preprocessing.
Talk at the 2nd German Heterogeneous Computing Group (GHCG) Meeting, Aachen, Germany, May 24, 2013.

2012

5 R. Membarth.
Code Generation for GPU Accelerators in Medical Imaging.
Invited Talk at the Symposium on Personal High-Performance Computing (PHPC), Brussels, Belgium, December 13, 2012.
4 R. Membarth.
Automatic Code Generation for Image Processing Algorithms on Accelerators in Heterogeneous Architectures.
Talk, Intel GmbH, Braunschweig, Germany, September 20, 2012.
3 M. Körner, W. Eckert, R. Membarth, F. Hannig and J. Teich.
Entwicklungsframeworks für Mehrkernarchitekturen und Grafikprozessoren: Evaluierung anhand eines Algorithmus zur Registrierung von 3D- mit 2D-Bilddaten.
Talk at the Conference for Parallel Programming, Concurrency, and Multi-core Systems (parallel), Karlsruhe, Germany, May 23-25, 2012.

2011

2 W. Eckert and R. Membarth.
Frameworks for Multicore Architectures and GPU Accelerators: A Comprehensive Evaluation using 2D/3D Image Registration.
Talk at the Conference Multicore@Siemens, Erlangen, Germany, November 15-16, 2011.
1 R. Membarth, F. Hannig, J. Teich, M. Körner and W. Eckert.
Domain-specific Computing and Code Generation for Medical Imaging.
Poster Presentation at the 2nd Programming and Tuning Massively Parallel Systems Summer School (PUMPS), Barcelona, Spain, July 18-22, 2011.

Thesis

2008

2 R. Membarth.
Efficient Mapping Methodology for Medical Image Processing on GPUs.
Diploma thesis (Diplomarbeit), Department of Computer Science, University of Erlangen-Nuremberg, Germany, September 2008.

2006

1 R. Membarth.
Messung der Quality of Service (QoS)-Parameter eines embedded-Linux-Systems mit Echtzeit Erweiterung (RTAI).
Pre-Master's thesis (Studienarbeit), Department of Computer Science, University of Erlangen-Nuremberg, Germany, January 2006.