Dr.-Ing. Richard Membarth
German Research Center for Artificial Intelligence (DFKI)
Agents and Simulated Reality
Saarland Informatics Campus D3 4
Computer Graphics Lab & Intel Visual Computing Institute
Saarland Informatics Campus E1 1
|Phone:||+49 681 302 3835|
|Fax:||+49 681 302 3843|
- AnyDSL: A Framework for rapid development of domain-specific languages: AnyDSL website
- HIPAcc: A domain-specific language and compiler for image processing: hipacc-lang.org
Program Committee Member
- GPGPU: Workshop on General Purpose Processing Using GPUs
- HPG: High-Performance Graphics
- ISC: International Supercomputing Conference
- IWOCL: International Workshop on OpenCL
- ASR-MOV: Workshop on Architectures and Systems for Real-Time Mobile Vision Applications
- HIS: Workshop on Heterogeneous Architectures and Design Methods for Embedded Image Systems
For more details have a look at my old webpage.
|31 O. Reiche, M. A. Özkan, R. Membarth, J. Teich and F. Hannig|
Generating FPGA-based Image Processing Accelerators with Hipacc.
To appear In Proceedings of the International Conference On Computer Aided Design (ICCAD), pp. 1-8, Irvine, CA, USA, November 13-16, 2017.
|30 A. Pérard-Gayot, M. Weier, R. Membarth, P. Slusallek, R. Leißa and S. Hack.|
RaTrace: Simple and Efficient Abstractions for BVH Ray Traversal Algorithms.
To appear In Proceedings of the 16th International Conference on Generative Programming: Concepts & Experiences (GPCE), pp. 1-12, Vancouver, BC, Canada, October 23-24, 2017.
|29 D. Pohl, D. Jungmann, B. Taudul, R. Membarth, H. Hariharan, T. Herfet and O. Grau.|
The Next Generation of In-home Streaming: Light Fields, 5K, 10 GbE, and Foveated Compression.
Best Paper Award
In Proceedings of the 10th International Symposium on Multimedia Applications and Processing (MMAP), pp. 669-673, Prague, Czech Republic, September 3-6, 2017.
|28 R. Membarth, O. Reiche, F. Hannig, J. Teich, M. Körner and W. Eckert.|
Hipacc: A Domain-Specific Language and Compiler for Image Processing.
In Transactions on Parallel and Distributed Systems (TPDS), 27(1), pp. 210-224, 2016.
|27 R. Leißa, K. Boesche, S. Hack, R. Membarth and P. Slusallek.|
Shallow Embedding of DSLs via Online Partial Evaluation.
Best Paper Award
In Proceedings of the 14th International Conference on Generative Programming: Concepts & Experiences (GPCE), pp. 11-20, Pittsburgh, PA, USA, October 26-27, 2015.
|26 D. Pohl, B. Taudul, R. Membarth, S. Nickels and O. Grau.|
Advanced In-home Streaming to Mobile Devices and Wearables.
In International Journal of Computer Science & Applications (IJCSA), 12(2), pp. 20-36, 2015.
|25 R. Membarth, P. Slusallek, M. Köster, R. Leißa and S. Hack.|
Target-Specific Refinement of Multigrid Codes.
In Proceedings of the 4th International Workshop on Domain-Specific Languages and High-Level Frameworks for High Performance Computing (WOLFHPC), pp. 52-57, New Orleans, LA, USA, November 17, 2014.
|24 R. Membarth, O. Reiche, C. Schmitt, F. Hannig, J. Teich, M. Stürmer and H. Köstler.|
Towards a Performance-portable Description of Geometric Multigrid Algorithms using a Domain-specific Language.
In Journal of Parallel and Distributed Computing (JPDC), 74(12), pp. 3191-3201, 2014.
|23 O. Reiche, M. Schmid, F. Hannig, R. Membarth and J. Teich.|
Code Generation from a Domain-specific Language for C-based HLS of Hardware Accelerators.
In Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), pp. 17:1-17:10, New Delhi, India, October 12-17, 2014.
|22 M. Köster, R. Leißa, S. Hack, R. Membarth and P. Slusallek.|
Code Refinement of Stencil Codes.
In Parallel Processing Letters (PPL), 24(3), pp. 1-16, 2014.
|21 P. Danilewski, M. Köster, R. Leißa, R. Membarth and P. Slusallek|
Specialization through Dynamic Staging.
In Proceedings of the 13th International Conference on Generative Programming: Concepts & Experiences (GPCE), pp. 103-112, Västerås, Sweden, September 15-16, 2014.
|20 R. Membarth, O. Reiche, F. Hannig and J. Teich.|
Code Generation for Embedded Heterogeneous Architectures on Android.
In Proceedings of the Conference on Design, Automation and Test in Europe (DATE), pp. 86:1-86:6, Dresden, Germany, March 24-28, 2014.
|19 M. Köster, R. Leißa, S. Hack, R. Membarth and P. Slusallek.|
Platform-Specific Optimization and Mapping of Stencil Codes through Refinement.
In Proceedings of the 1st International Workshop on High-Performance Stencil Computations (HiStencils), pp. 1-6, Vienna, Austria, January 21, 2014.
|18 R. Membarth.|
Code Generation for GPU Accelerators from a Domain-Specific Language for Medical Imaging.
Dissertation, University of Erlangen-Nuremberg, ISBN 978-3-8439-1074-3, Verlag Dr. Hut, Munich, Germany, May 2, 2013.
|17 R. Membarth, F. Hannig, J. Teich and H. Köstler.|
Towards Domain-specific Computing for Stencil Codes in HPC.
In Proceedings of the 2nd International Workshop on Domain-Specific Languages and High-Level Frameworks for High Performance Computing (WOLFHPC), pp. 1133-1138, Salt Lake City, UT, USA, November 16, 2012.
|16 R. Membarth, F. Hannig, J. Teich, M. Körner and W. Eckert.|
Mastering Software Variant Explosion for GPU Accelerators.
In Proceedings of the 10th International Workshop on Algorithms, Models and Tools for Parallel Computing on Heterogeneous Platforms (HeteroPar), pp. 123-132, Rhodes Island, Greece, August 27, 2012.
|15 R. Membarth, F. Hannig, J. Teich, M. Körner and W. Eckert.|
Automatic Optimization of In-Flight Memory Transactions for GPU Accelerators based on a Domain-Specific Language for Medical Imaging.
In Proceedings of the 11th International Symposium on Parallel and Distributed Computing (ISPDC), pp. 211-218, Munich, Germany, June 25-29, 2012.
|14 R. Membarth, F. Hannig, J. Teich, M. Körner and W. Eckert.|
Generating Device-specific GPU Code for Local Operators in Medical Imaging.
In Proceedings of the 26th IEEE International Parallel & Distributed Processing Symposium (IPDPS), pp. 569-581, Shanghai, China, May 21-25, 2012.
|13 R. Membarth, J. Lupp, F. Hannig, J. Teich, M. Körner and W. Eckert.|
Dynamic Task-Scheduling and Resource Management for GPU Accelerators in Medical Imaging.
In Proceedings of the 25th International Conference on Architecture of Computing Systems (ARCS), pp. 147-159, Munich, Germany, February 28 - March 02, 2012.
|12 R. Membarth, A. Lokhmotov and J. Teich.|
Generating GPU Code from a High-level Representation for Image Processing Kernels.
In Proceedings of the 5th Workshop on Highly Parallel Processing on a Chip (HPPC), pp. 270-280, Bordeaux, France, August 30, 2011.
|11 R. Membarth, F. Hannig, J. Teich, M. Körner and W. Eckert.|
Frameworks for GPU Accelerators: A Comprehensive Evaluation using 2D/3D Image Registration.
In Proceedings of the 9th IEEE Symposium on Application Specific Processors (SASP), pp. 78-81, San Diego, CA, USA, June 5-6, 2011.
|10 R. Membarth, H. Dutta, F. Hannig and J. Teich.|
Efficient Mapping of Streaming Applications for Image Processing on Graphics Cards.
In Transactions on High-Performance Embedded Architectures and Compilers (Transactions on HiPEAC), 5(3), 2011.
|9 R. Membarth, F. Hannig, J. Teich, M. Körner and W. Eckert.|
Frameworks for Multi-core Architectures: A Comprehensive Evaluation using 2D/3D Image Registration.
In Proceedings of the 24th International Conference on Architecture of Computing Systems (ARCS), pp. 62-73, Lake Como, Italy, February 22-25, 2011.
|8 R. Membarth, F. Hannig, J. Teich, G. Litz and H. Hornegger.|
Detector Defect Correction of Medical Images on Graphics Processors.
In Proceedings of the SPIE: Medical Imaging 2011: Image Processing, pp. 79624M 1-12, Lake Buena Vista, Orlando, FL, USA, February 12-17, 2011.
|7 R. Membarth, F. Hannig, J. Teich, M. Körner and W. Eckert.|
Comparison of Parallelization Frameworks for Shared Memory Multi-Core Architectures.
In Proceedings of the Embedded World Conference, Nuremberg, Germany, March 03-05, 2010.
|6 N. Sarkar and R. Membarth.|
Modeling and Simulation of IEEE 802.11g using OMNeT++.
In Handbook of Research on Discrete Event Simulation Environments: Technologies and Applications, pp. 379-397, Information Science Reference, Hershey, PA, October, 2009.
|5 F. Arifin, R. Membarth, A. Amouri, F. Hannig and J. Teich.|
FSM-Controlled Architectures for Linear Invasion.
In Proceedings of the 17th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), pp. 59-64, Florianópolis, Brazil, October 12-14, 2009.
|4 R. Membarth, F. Hannig, H. Dutta and J. Teich.|
Efficient Mapping of Multiresolution Image Filtering Algorithms on Graphics Processors.
In Proceedings of the 9th International Workshop on Systems, Architectures, Modeling, and Simulation (SAMOS Workshop), pp. 277-288, July 20-23, 2009.
|3 R. Membarth, F. Hannig, H. Dutta and J. Teich.|
Optimization Flow for Algorithm Mapping on Graphics Cards.
In Proceedings of ACACES 2009 Poster Abstracts: Advanced Computer Architecture and Compilation for Embedded Systems, pp. 229-232, Barcelona, Spain, July 12-18, 2009.
|2 R. Membarth, P. Kutzer, H. Dutta, F. Hannig and J. Teich.|
Acceleration of Multiresolution Imaging Algorithms: A Comparative Study.
In Proceedings of the 20th IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP), pp. 211-214, Boston, MA, USA, July 7-9, 2009.
|1 K. Köker, R. Membarth and R. German.|
Performance Analyses of Embedded Real-Time Operating Systems Using High-Precision Counters.
In Proceedings of the 3rd International Conference on Autonomous Robots and Agents (ICARA), pp 485-490, Palmerston North, New Zealand, December 12-14, 2006.